embedded - stm32f405 generate trigger signal pwm -
i'm trying generate phase shift pwm signal using 3 timers.
- tim1 used reference(running @ 1mhz)
- tim3 used trigger phase shift tim4
- tim4 used generate phase shifted signal triggerd tim3
to sum up: tim1 --- triggers --> tim3 --- triggers ---> tim4
the signal should like:
reference: tim1 (1 mhz) ___ ___ ___ ___ ___| |___| |___| |___| |___| tim count 0 84 168 update event ^ ^ ^ ^ ^ trigger signal: tim 3 triggered tim1 ((single pulse mode!!) 1mhz /| /| /| /| /| / | / | / | / | / | tim count 0 20 update event ^ ^ ^ ^ ^ phase shift signal tim4 (1mhz) same duty cycle tim1 triggered tim3 ___ ___ ___ ___ ___ ___| |___| |___| |___| |___| |_ here current code. reference running correctly @ 1mhz. trigger signal not working now. error should anywhere in initreferencetimer() or initreferencepwm() function. it's not working generate trigger signal mentioned above. not able test, if phased shift signal triggered correctly.
does have idea it?
for debugging bind trigger signal output pin.
#define timer_clock 84 #define tim1_timer_clock 168 #define frequ 1 //mhz #define shift 20 #define masterperiod (tim1_timer_clock/frequ)-1 #define masterpulse ((tim1_timer_clock/frequ)-1)/2 #define referenceperiod shift #define referencepulse (shift/2) #define slaveperiod (tim1_timer_clock/frequ)-1 #define slavepulse ((tim1_timer_clock/frequ)-1)/2 //tim1 channel1: pa7 n void initmasterpin() { gpio_inittypedef gpio_initstructuretimer; // port clock enable rcc_ahb1periphclockcmd(rcc_ahb1periph_gpioa, enable); // set pwm port, pin , method gpio_initstructuretimer.gpio_pin = gpio_pin_7; gpio_initstructuretimer.gpio_mode = gpio_mode_af; gpio_initstructuretimer.gpio_speed = gpio_speed_100mhz; gpio_initstructuretimer.gpio_otype = gpio_otype_pp; gpio_initstructuretimer.gpio_pupd = gpio_pupd_up ; gpio_init(gpioa, &gpio_initstructuretimer); // connect tim pin af gpio_pinafconfig(gpioa, gpio_pinsource7, gpio_af_tim1); } //tim3 channel1 pc6 void initreferencepin() { gpio_inittypedef gpio_initstructuretimer; // port clock enable rcc_ahb1periphclockcmd(rcc_ahb1periph_gpioc, enable); // set pwm port, pin , method gpio_initstructuretimer.gpio_pin = gpio_pin_6; gpio_initstructuretimer.gpio_mode = gpio_mode_af; gpio_initstructuretimer.gpio_speed = gpio_speed_100mhz; gpio_initstructuretimer.gpio_otype = gpio_otype_pp; gpio_initstructuretimer.gpio_pupd = gpio_pupd_up ; gpio_init(gpioc, &gpio_initstructuretimer); // connect tim pin af gpio_pinafconfig(gpioc, gpio_pinsource6, gpio_af_tim3); } //tim4 channel1: pb6 void initslavepin() { gpio_inittypedef gpio_initstructuretimer; // port clock enable rcc_ahb1periphclockcmd(rcc_ahb1periph_gpiob, enable); // set pwm port, pin , method gpio_initstructuretimer.gpio_pin = gpio_pin_6; gpio_initstructuretimer.gpio_mode = gpio_mode_af; gpio_initstructuretimer.gpio_speed = gpio_speed_100mhz; gpio_initstructuretimer.gpio_otype = gpio_otype_pp; gpio_initstructuretimer.gpio_pupd = gpio_pupd_up ; gpio_init(gpiob, &gpio_initstructuretimer); // connect tim pin af gpio_pinafconfig(gpiob, gpio_pinsource6, gpio_af_tim4); } //tim1 channel1: pa7 void initmastertimer() { // set timer frequencies tim_timebaseinittypedef tim_config; // 1.enable tim clock rcc_apb2periphclockcmd (rcc_apb2periph_tim1, enable); // 2.fill tim_timebaseinitstruct desired parameters. // time base configuration tim_timebasestructinit (&tim_config); tim_config.tim_period = masterperiod; tim_config.tim_prescaler = 0; tim_config.tim_countermode = tim_countermode_up; tim_config.tim_clockdivision = tim_ckd_div1; tim_config.tim_repetitioncounter = 0; //configure time base unit corresponding configuration tim_timebaseinit (tim1, &tim_config); // enable nvic if need generate update interrupt. // enable corresponding interrupt } //tim3 channel1 pc6 void initreferencetimer() { // set timer frequencies tim_timebaseinittypedef tim_config; // 1.enable tim clock rcc_apb1periphclockcmd (rcc_apb1periph_tim3, enable); // 2.fill tim_timebaseinitstruct desired parameters. // time base configuration tim_timebasestructinit (&tim_config); tim_config.tim_period = referenceperiod;//one step phase shift tim_config.tim_prescaler = 0; tim_config.tim_countermode = tim_countermode_up; tim_config.tim_clockdivision = tim_ckd_div1; tim_config.tim_repetitioncounter = 0; //configure time base unit corresponding configuration tim_timebaseinit (tim3, &tim_config); // enable nvic if need generate update interrupt. // enable corresponding interrupt } //tim4 channel1: pb6 void initslavetimer() { // set timer frequencies tim_timebaseinittypedef tim_config; // 1.enable tim clock rcc_apb1periphclockcmd (rcc_apb1periph_tim4, enable); // 2.fill tim_timebaseinitstruct desired parameters. // time base configuration tim_timebasestructinit (&tim_config); tim_config.tim_period = slaveperiod; tim_config.tim_prescaler = 0; tim_config.tim_countermode = tim_countermode_up; tim_config.tim_clockdivision = tim_ckd_div1; tim_config.tim_repetitioncounter = 0; //configure time base unit corresponding configuration tim_timebaseinit (tim4, &tim_config); // enable nvic if need generate update interrupt. // enable corresponding interrupt } //tim1 channel1: pa7 void initmasterpwm(void) { tim_ocinittypedef tim_ocinitstructure; tim_ocstructinit(&tim_ocinitstructure); tim_ocinitstructure.tim_ocmode = tim_ocmode_pwm1; tim_ocinitstructure.tim_outputstate = tim_outputstate_enable; tim_ocinitstructure.tim_outputnstate = tim_outputnstate_enable; tim_ocinitstructure.tim_pulse = masterpulse; tim_ocinitstructure.tim_ocpolarity = tim_ocpolarity_high; tim_ocinitstructure.tim_ocnpolarity = tim_ocnpolarity_high; tim_oc1init(tim1, &tim_ocinitstructure); /* master mode selection */ tim_selectoutputtrigger(tim1, tim_trgosource_update); /* select master slave mode */ tim_selectmasterslavemode(tim1, tim_masterslavemode_enable); } //tim3 channel1 pc6 void initreferencepwm(void) { tim_ocinittypedef tim_ocinitstructure; tim_ocstructinit(&tim_ocinitstructure); tim_ocinitstructure.tim_ocmode = tim_ocmode_pwm1; tim_ocinitstructure.tim_outputstate = tim_outputstate_enable; tim_ocinitstructure.tim_outputnstate = tim_outputnstate_enable; tim_ocinitstructure.tim_pulse = referencepulse; // set duty cycle / pulse here! tim_ocinitstructure.tim_ocpolarity = tim_ocpolarity_high; tim_ocinitstructure.tim_ocnpolarity = tim_ocnpolarity_high; tim_oc1init(tim3, &tim_ocinitstructure); tim_selectonepulsemode(tim3, tim_opmode_single); /* slave mode selection: tim3 */ tim_selectinputtrigger(tim3, tim_ts_itr0); tim_selectslavemode(tim2, tim_slavemode_gated); /* select master slave mode */ tim_selectoutputtrigger(tim3, tim_trgosource_update); tim_selectmasterslavemode(tim3, tim_masterslavemode_enable); } //tim4 channel1: pb6 void initslavepwm(void) { tim_ocinittypedef tim_ocinitstructure; tim_ocstructinit(&tim_ocinitstructure); tim_ocinitstructure.tim_ocmode = tim_ocmode_pwm1; tim_ocinitstructure.tim_outputstate = tim_outputstate_enable; tim_ocinitstructure.tim_outputnstate = tim_outputnstate_enable; tim_ocinitstructure.tim_pulse = slavepulse; tim_ocinitstructure.tim_ocpolarity = tim_ocpolarity_high; tim_ocinitstructure.tim_ocnpolarity = tim_ocnpolarity_high; tim_oc1init(tim4, &tim_ocinitstructure); tim_selectinputtrigger(tim4, tim_ts_itr2); tim_selectslavemode(tim4, tim_slavemode_gated); tim_selectonepulsemode(tim4, tim_opmode_single); } int main(void) { initmasterpin(); initreferencepin(); //for debugging initslavepin(); initmastertimer(); initreferencetimer(); initslavetimer(); initmasterpwm(); initreferencepwm(); initslavepwm(); // enable timer / counter tim_cmd(tim1, enable); tim_cmd(tim3, enable); tim_cmd(tim4, enable); tim_ctrlpwmoutputs(tim1, enable); tim_ctrlpwmoutputs(tim3, enable); tim_ctrlpwmoutputs(tim4, enable); /* busy loop */ int i; while (1) { i++; } }
are sure don't have typo in initreferencepwm?
void initreferencepwm(void) { ... tim_selectslavemode(tim2, tim_slavemode_gated); ... } why tim2 sudden?
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